At the present time, the implementation of integrated circuits involves the design, drafting and integration of circuits of greater and greater complexity by virtue of the novel successive functions fulfilled by them.
While one of the major objectives, up to recent times, in respect of the implementation of such circuits, has consisted, at the cost of very substantial research and development effort, in steadily enhancing the possibilities for integration, by successively employing technologies for etching from micron fineness to submicron fineness, in order to cater for the appearance of the aforementioned novel functions by increasing the density of integration, it has also appeared to be necessary, by virtue in particular of the variety and diversity of the basic circuits required to carry out these functions, to provide a specific electrical supply, via functional areas, for these basic circuits or groups of basic circuits. This is because the physical phenomena brought into play by these basic circuits or groups of basic circuits are sufficiently different as to justify a specific electrical supply thereto, so as to allow, in particular, optimum functioning thereof as a function of their supply voltage.
Thus, by way of non-limiting example, in the case of a random access memory area, RAM memory, such memory areas usually comprise, in current integrated circuits, as represented in FIG. 1.sub.0, a central area or core C, formed by memory cells in which digital data can be stored, and a peripheral area P, formed by buffer circuits, allowing write/read access of the aforementioned memory cells.
When the technology used to produce such memory circuits is for example CMOS technology, it is advantageous to maintain the supply voltage to the memory cells at a relatively high value, so as to benefit from the higher switching speed, and hence from the greater read/write speed, of the aforementioned memory areas.
However, supplying the peripheral area, formed by the buffer circuits, at as high a voltage, is not justified
This is because, on the one hand, maintaining a high supply voltage to the aforementioned buffer area is liable to cause a non-negligible level of noise to be maintained on the input/output signals, that is to say the signals for writing/reading the memory cells, transmitted by the aforementioned buffer area.
On the other hand, maintaining a relatively high supply voltage to the buffer area maintains a substantial level of electrical consumption while, with regard to these buffer circuits, the switching speed is not vital, on account of the buffer function of these circuits, this manifestly impeding the actual endurance of sophisticated functional elements such as portable microcomputers supplied from a storage battery.
Finally, within the context of current or foreseeable development work aimed at reducing the amplitude of switching of logic signals from a high analogue level to a low analogue level, it would appear opportune to be able to utilize devices for converting analogue levels from a standard customarily used value to a smaller less commonly used value or vice versa, so as to provide for progressive adaptation of newly developed integrated circuits or parts of integrated circuits, supplied with these less common values of supply voltage, to conventional integrated circuits supplied with these standard supply values.